#Input file for tb_clockstate.vhdl

#Format is input(8 downto 0) " " expected_out(6 downto 0)

#From state init state changes only with a_ok(exept with alarm)
000000000 1000000
010000000 1000000
001000000 1000000
000000010 1000000

#From reset untill time_is_set = 1
100000000 0100000
000000000 0100000
000000100 1000000
100000000 0100000
000001000 0010000
000000010 0001000
000000000 0001000

#Test timeset now that time_is_set = 1
001000000 0100000
100000000 0100000
000001000 0001000
001000000 0100000
000000100 0001000

#Test alarm set
010000000 0000100
000100000 0000010
000001000 0001000
000000000 0001000

#Alarm should override all other events
001010000 0000001
000000000 0000001
100000000 0001000