/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . --- A special exception to the GPL can be applied should you wish to distribute a combined work that includes ChibiOS/RT, without being obliged to provide the source code for any proprietary components. See the file exception.txt for full details of how and when the exception can be applied. */ #ifndef _BOARD_H_ #define _BOARD_H_ /* * Board identifier. */ #define BOARD_NAME "Sphere board" /* * Board frequencies. */ #define STM32_LSECLK 32768 #define STM32_HSECLK 8000000 /* * MCU type as defined in the ST header file stm32l1xx.h. */ #define STM32L1XX_MD /* * IO pins assignments. */ #define GPIOA_WKUP 0 #define GPIOA_RF_CPUMP1 1 // TIM2 #define GPIOA_RF_CPUMP2 2 #define GPIOA_RF_USART2RX 3 #define GPIOA_USART1TX 9 #define GPIOA_USART1RX 10 #define GPIOA_USBDM 11 #define GPIOA_USBDP 12 #define GPIOA_SWDIO 13 #define GPIOA_SWCLK 14 #define GPIOA_VCC 15 // To ease PCB layout, must be input pin #define GPIOB_BOOT1_GND 2 #define GPIOB_SERVO_TIM3CH1 4 #define GPIOB_SERVO_PWR 5 #define GPIOB_MOTOR1_TIM4CH1 6 #define GPIOB_MOTOR2_TIM4CH2 7 #define GPIOB_I2C2_SCL 10 #define GPIOB_I2C2_SDA 11 #define GPIOC_RF_PWR 13 /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ #define PIN_MODE_INPUT(n) (0U << ((n) * 2)) #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) #define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) #define PIN_OSPEED_400K(n) (0U << ((n) * 2)) #define PIN_OSPEED_2M(n) (1U << ((n) * 2)) #define PIN_OSPEED_10M(n) (2U << ((n) * 2)) #define PIN_OSPEED_40M(n) (3U << ((n) * 2)) #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) #define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) /* * Port A setup. */ #define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(GPIOA_WKUP) | \ PIN_MODE_ALTERNATE(GPIOA_RF_CPUMP1) | \ PIN_MODE_ALTERNATE(GPIOA_RF_CPUMP2) | \ PIN_MODE_ALTERNATE(GPIOA_RF_USART2RX) | \ PIN_MODE_ALTERNATE(GPIOA_USART1TX) | \ PIN_MODE_ALTERNATE(GPIOA_USART1RX) | \ PIN_MODE_INPUT(GPIOA_USBDM) | \ PIN_MODE_INPUT(GPIOA_USBDP) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK)) #define VAL_GPIOA_OTYPER 0x00000000 #define VAL_GPIOA_OSPEEDR 0xFFFF5555 // 2 MHz io port speed #define VAL_GPIOA_PUPDR (PIN_PUDR_PULLDOWN(GPIOA_WKUP) | \ PIN_PUDR_PULLUP(1) | \ PIN_PUDR_PULLUP(2) | \ PIN_PUDR_PULLUP(3) | \ PIN_PUDR_PULLUP(4) | \ PIN_PUDR_PULLUP(5) | \ PIN_PUDR_PULLUP(6) | \ PIN_PUDR_PULLUP(7) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_PULLUP(9) | \ PIN_PUDR_PULLUP(10) | \ PIN_PUDR_FLOATING(11) | \ PIN_PUDR_FLOATING(12) | \ PIN_PUDR_PULLUP(13) | \ PIN_PUDR_PULLUP(14) | \ PIN_PUDR_PULLUP(15)) #define VAL_GPIOA_ODR 0xFFFFFFFF #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, 0) | \ PIN_AFIO_AF(GPIOA_RF_CPUMP1, 1) | \ PIN_AFIO_AF(GPIOA_RF_CPUMP2, 1) | \ PIN_AFIO_AF(GPIOA_RF_USART2RX, 7)) #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_USART1TX, 7) | \ PIN_AFIO_AF(GPIOA_USART1RX, 7) | \ PIN_AFIO_AF(GPIOA_USBDM, 10) | \ PIN_AFIO_AF(GPIOA_USBDP, 10) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0)) /* * Port B setup. */ #define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(GPIOB_SERVO_TIM3CH1) | \ PIN_MODE_OUTPUT(GPIOB_SERVO_PWR) | \ PIN_MODE_ALTERNATE(GPIOB_MOTOR1_TIM4CH1) | \ PIN_MODE_ALTERNATE(GPIOB_MOTOR2_TIM4CH2) | \ PIN_MODE_ALTERNATE(GPIOB_I2C2_SCL) | \ PIN_MODE_ALTERNATE(GPIOB_I2C2_SDA)) #define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_MOTOR1_TIM4CH1) | \ PIN_OTYPE_OPENDRAIN(GPIOB_MOTOR2_TIM4CH2) | \ PIN_OTYPE_PUSHPULL(GPIOB_I2C2_SCL) | \ PIN_OTYPE_OPENDRAIN(GPIOB_I2C2_SDA)) #define VAL_GPIOB_OSPEEDR 0x55555555 #define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \ PIN_PUDR_PULLUP(1) | \ PIN_PUDR_PULLDOWN(2) | \ PIN_PUDR_PULLUP(3) | \ PIN_PUDR_FLOATING(4) | \ PIN_PUDR_FLOATING(5) | \ PIN_PUDR_FLOATING(6) | \ PIN_PUDR_FLOATING(7) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_PULLUP(9) | \ PIN_PUDR_PULLUP(10) | \ PIN_PUDR_PULLUP(11) | \ PIN_PUDR_PULLUP(12) | \ PIN_PUDR_PULLUP(13) | \ PIN_PUDR_PULLUP(14) | \ PIN_PUDR_PULLUP(15)) #define VAL_GPIOB_ODR 0xFFFFFFEF #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SERVO_TIM3CH1, 2) | \ PIN_AFIO_AF(GPIOB_MOTOR1_TIM4CH1, 2) | \ PIN_AFIO_AF(GPIOB_MOTOR2_TIM4CH2, 2)) #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C2_SCL, 4) | \ PIN_AFIO_AF(GPIOB_I2C2_SDA, 4)) /* * Port C setup. */ #define VAL_GPIOC_MODER PIN_MODE_OUTPUT(GPIOC_RF_PWR) #define VAL_GPIOC_OTYPER 0x00000000 #define VAL_GPIOC_OSPEEDR 0x55555555 #define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(13) | \ PIN_PUDR_FLOATING(14) | \ PIN_PUDR_FLOATING(15)) #define VAL_GPIOC_ODR 0x00000000 #define VAL_GPIOC_AFRL 0x00000000 #define VAL_GPIOC_AFRH 0x00000000 /* * Port D setup. * All input with pull-up. */ #define VAL_GPIOD_MODER 0x00000000 #define VAL_GPIOD_OTYPER 0x00000000 #define VAL_GPIOD_OSPEEDR 0xFFFFFFFF #define VAL_GPIOD_PUPDR 0xFFFFFFFF #define VAL_GPIOD_ODR 0xFFFFFFFF #define VAL_GPIOD_AFRL 0x00000000 #define VAL_GPIOD_AFRH 0x00000000 /* * Port E setup. * All input with pull-up. */ #define VAL_GPIOE_MODER 0x00000000 #define VAL_GPIOE_OTYPER 0x00000000 #define VAL_GPIOE_OSPEEDR 0xFFFFFFFF #define VAL_GPIOE_PUPDR 0xFFFFFFFF #define VAL_GPIOE_ODR 0xFFFFFFFF #define VAL_GPIOE_AFRL 0x00000000 #define VAL_GPIOE_AFRH 0x00000000 /* * Port H setup. */ #define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(0) | \ PIN_MODE_ALTERNATE(1)) #define VAL_GPIOH_OTYPER 0x00000000 #define VAL_GPIOH_OSPEEDR 0xFFFFFFFF #define VAL_GPIOH_PUPDR 0x00000000 #define VAL_GPIOH_ODR 0xFFFFFFFF #define VAL_GPIOH_AFRL 0x00000000 #define VAL_GPIOH_AFRH 0x00000000 #if !defined(_FROM_ASM_) #ifdef __cplusplus extern "C" { #endif void boardInit(void); #ifdef __cplusplus } #endif #endif /* _FROM_ASM_ */ #endif /* _BOARD_H_ */