/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . --- A special exception to the GPL can be applied should you wish to distribute a combined work that includes ChibiOS/RT, without being obliged to provide the source code for any proprietary components. See the file exception.txt for full details of how and when the exception can be applied. */ #ifndef _BOARD_H_ #define _BOARD_H_ /* * Setup for STMicroelectronics STM32L-Discovery board. */ /* * Board identifier. */ #define BOARD_LEDCTRL #define BOARD_NAME "LED Controller" /* * Board frequencies. * NOTE: The HSE crystal is not fitted by default on the board. */ #define STM32_LSECLK 32768 #define STM32_HSECLK 8000000 /* * MCU type as defined in the ST header file stm32l1xx.h. */ #define STM32L1XX_MD /* * IO pins assignments. */ #define GPIOA_VBUS 0 #define GPIOA_USBDM 11 #define GPIOA_USBDP 12 #define GPIOA_SWDIO 13 #define GPIOA_SWCLK 14 #define GPIOA_IR_IN 15 #define GPIOB_RED 12 #define GPIOB_GREEN 13 #define GPIOB_BLUE 15 #define GPIOC_OSC32_IN 14 #define GPIOC_OSC32_OUT 15 /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ #define PIN_MODE_INPUT(n) (0U << ((n) * 2)) #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) #define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) #define PIN_OSPEED_400K(n) (0U << ((n) * 2)) #define PIN_OSPEED_2M(n) (1U << ((n) * 2)) #define PIN_OSPEED_10M(n) (2U << ((n) * 2)) #define PIN_OSPEED_40M(n) (3U << ((n) * 2)) #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) #define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) /* * Port A setup. */ #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_VBUS) | \ PIN_MODE_INPUT(GPIOA_USBDM) | \ PIN_MODE_INPUT(GPIOA_USBDP) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ PIN_MODE_ALTERNATE(GPIOA_IR_IN)) #define VAL_GPIOA_OTYPER 0x00000000 #define VAL_GPIOA_OSPEEDR 0xFFFFFFFF #define VAL_GPIOA_PUPDR (PIN_PUDR_PULLDOWN(GPIOA_VBUS) | \ PIN_PUDR_PULLUP(1) | \ PIN_PUDR_PULLUP(2) | \ PIN_PUDR_PULLUP(3) | \ PIN_PUDR_PULLUP(4) | \ PIN_PUDR_PULLUP(5) | \ PIN_PUDR_PULLUP(6) | \ PIN_PUDR_PULLUP(7) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_PULLUP(9) | \ PIN_PUDR_PULLUP(10) | \ PIN_PUDR_PULLUP(GPIOA_IR_IN)) #define VAL_GPIOA_ODR 0x00000000 #define VAL_GPIOA_AFRL (0) #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_USBDM, 10) | \ PIN_AFIO_AF(GPIOA_USBDP, 10) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ PIN_AFIO_AF(GPIOA_IR_IN, 1)) /* * Port B setup. */ #define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(GPIOB_RED) | \ PIN_MODE_ALTERNATE(GPIOB_GREEN) | \ PIN_MODE_ALTERNATE(GPIOB_BLUE)) #define VAL_GPIOB_OTYPER (0) #define VAL_GPIOB_OSPEEDR (0xFFFFFFFF) #define VAL_GPIOB_PUPDR 0x55555555 #define VAL_GPIOB_ODR (0) #define VAL_GPIOB_AFRL 0x00000000 #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_RED, 3) | \ PIN_AFIO_AF(GPIOB_GREEN, 3) | \ PIN_AFIO_AF(GPIOB_BLUE, 3)) /* * Port C setup. */ #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ PIN_MODE_INPUT(GPIOC_OSC32_OUT)) #define VAL_GPIOC_OTYPER 0x00000000 #define VAL_GPIOC_OSPEEDR 0xFFFFFFFF #define VAL_GPIOC_PUPDR 0x00000000 #define VAL_GPIOC_ODR 0x00000000 #define VAL_GPIOC_AFRL 0x00000000 #define VAL_GPIOC_AFRH 0x00000000 /* * Port H setup. */ #define VAL_GPIOH_MODER (0) #define VAL_GPIOH_OTYPER 0x00000000 #define VAL_GPIOH_OSPEEDR 0xFFFFFFFF #define VAL_GPIOH_PUPDR 0x55555555 #define VAL_GPIOH_ODR 0x00000000 #define VAL_GPIOH_AFRL 0x00000000 #define VAL_GPIOH_AFRH 0x00000000 #if !defined(_FROM_ASM_) #ifdef __cplusplus extern "C" { #endif void boardInit(void); #ifdef __cplusplus } #endif #endif /* _FROM_ASM_ */ #endif /* _BOARD_H_ */